1. Field of the Invention
The present invention relates to the field of data coherency. More particularly, the present invention relates to a system and method for ensuring that data coherency is maintained for transactions through an Accelerated Graphics Port (AGP) interface.
2. Art Related to the Invention
For a number of years, personal computers (PCs) have maintained system-wide data coherency in part through reliance on a particular memory access protocol adopted by conventional architectures of its bridge and input/output bus such as a Peripheral Component Interconnect (PCI) bus. For example, a bridge (e.g., 82430FX.TM. produced by Intel Corporation of Santa Clara, Calif.) is a chipset which interconnects various devices such as a processor, main memory, and the PCI bus. This bridge is implemented with general mechanisms to guarantee data coherency by loading the contents of its internal buffers to main memory in response to various events. In addition, the PCI bus is a "connected transaction" bus because it follows a bus ownership protocol that ensures a pending transaction is completed before another transaction begins. These transactions may be issued from any agent capable of gaining ownership of the PCI bus, including a graphics subsystem having a graphics controller coupled to both the PCI bus and a limited amount of dedicated graphic controller (GC) memory.
The graphics subsystem is responsible for rendering perspective views of a scene for display. Normally, objects in a three-dimensional (3D) scene are represented as polygons having bitmaps applied to their surfaces. Such bitmaps are referred to as "texture maps" because they are used to give a sense of texture to these polygonal objects. Since each 3D scene has a substantially large number of different perspective views, it is impractical to store all of these perspective views. Instead, by applying texture maps to various polygons within the scene, reshaping the polygons and remapping the texture maps to the polygons as the perspective view of the viewer changes, it becomes possible to render perspective views of the 3D scene in real-time.
Usually, texture maps and other information utilized by the graphics controller are commonly stored in main memory due to cost constraints and the fact that the majority of application programs running on PCs do not require a large amount of dedicated GC memory. As a result, the processor normally is responsible for either transferring data between the graphics controller and main memory over the PCI bus or setting up a direct memory access (DMA) operations between the graphics controller and main memory via the PCI bus.
Recently, it has been discovered that the PCI bus is poorly-suited for supporting graphics operations. The reason is that rendering usually requires repeated access to small portions of a texture mapping. In contrast, PCI-based graphics controllers are currently performing multiple bulk data transfers in order to load an entire texture mapping into its GC memory, even though only a particular portion of the texture mapping is desired. Thus, overall system performance is greatly reduced. In addition, for dynamic image rendering, image quality is sacrificed because the amount of texture mapping that can be stored in GC memory is restricted.